The PLECS Coder is part the PLECS suite of power simulation tools. The coder generates ANSI-C code from a simulation model which can be compiled to execute on the simulation host or a separate target, such as an embedded control platform, hardware-in-the-loop (HIL) system or real-time digital simulator. A typical application is to execute a PLECS model in real-time as a virtual plant for the verification and validation of control hardware and software. Generated code can also be compiled and executed on the host to reduce the simulation time of complex models.
Code Generation Targets
The PLECS Coder for PLECS Blockset fully integrates with Simulink Coder (formerly Real-Time Workshop). When the user starts the build process, PLECS automatically generates the code for a circuit block and inserts it in the appropriate places. PLECS can generate code for two different targets: the Rapid Simulation target (or RSim target) and the Real-Time target. By default, PLECS automatically selects the correct target depending on the target settings of Simulink Coder.
The generated code can be used on real-time platforms whose targets are supported by Simulink Coder, such as those developed by Opal-RT and dSPACE. Please consult the respective platform providers for further information.
|Platform||MATLAB Version||Operating System|
|Windows 32-bit||7.4 – 8.4||Windows Vista SP2 or newer|
|Windows 64-bit||7.4 – 8.4||Windows Vista SP2 64-bit or newer|
|Mac / Intel||7.4 – 8.4||Mac OS X 10.7.5 or newer|
|Linux 32-bit||7.4 – 7.14||Kernel 2.6.18/glibc 2.5/Xorg X11R6.8 or newer|
|Linux 64-bit||7.4 – 8.4||Kernel 2.6.18/glibc 2.5/Xorg X11R6.8 or newer|
Processor: Intel compatible processor with SSE2 resp. x86-64 extension