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PLECS RT Box

Hardware-In-The-Loop (HIL)

The PLECS RT Box provides enables real-time simulation for hardware-in-the-loop (HIL) testing of complex power electronics control systems. The RT Box works in conjunction with the PLECS Standalone and PLECS coder products to create a seamless interface between control hardware and system models.

PLECS-RT-BoxFeatures

  • 32 analogue and 64 digital I/O channels
  • ultra-low latency between I/O channels.
  • 16 bit ADCs and DACs provide a sample rate of 2 Msps.
  • All I/Os protected against ESD, short-circuits and overvoltages.
  • Digital I/O typically used for transmitting and receiving high-fidelity PWM signals compatible with 3.3V and 5V voltage levels.

hvdc_app_exam_single_system_circuit2

Technical Information

Processor
Xilinx Zynq Z-7030
CPU Clock Speed 1GHz

Digital Input
32 channels, 3.3V logic level (5V tolerant)
D-Sub 37-pin male connector
Overvoltage & ESD protection

Digital Output
32 channels, 3.3V & 5V logic levels
250ohm output impedance
D-Sub 37-pin female connector
Short-circuit, overvoltage & ESD protection

Analogue Input
16 channels, 16 bit resolution
-10 to 10V, differential input
2Msps sample rate, 1Mohm 24pF input impedance
D-Sub 37-pin male connector
Overvoltage & ESD protection

Analogue Output
-10 to +10V & 0 to 10V
-5 to 5V & 0 to 5V
16 channels, 16 bit resolution
2Msps sample rate, 0Mohm impedance
D-Sub 37-pin female connector
Short-circuit, overvoltage & ESD protection

Connectivity
RJ-45, gigabit ethernet
4x SFP+ 6.25Gbps high speed interconnect
High speed USB 2.0, type A
SD card slot for firmware

Power Supply Characteristics
100 – 240VAC, 50 – 60Hz

Dimensions
31 x 25 x 10 cm

Useful Documents

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PLECS RT Box Flyer

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PLECS RT Box Technical Specification

More Information?

Telephone +44 (0)1793 784389 or email: sales@ppm.co.uk