To celebrate the launch of the PLECS RT Box, PPM Power is pleased to host a free seminar on simulation techniques in power converter design by Plexim. When used with the PLECS circuit simulator and PLECS Coder, the RT Box provides a solution to support Hardware in the Loop (HIL) testing. PLECS is now a complete solution for power converter design from early stage simulation right through to real-time testing of the entire control hardware.
Topics to be covered in the seminar:
- Comparison of modelling and simulation techniques used for power converters with digital control:
- Model in the Loop (MIL): Both controls and converter modelled as functional block diagrams (typical for early stage design)
- Software in the loop (SIL): Execution of control code (handwritten or auto-generated) in offline-simulation along with the converter model
- Processor in the loop (PIL): Execution of control code on embedded target processor linked to offline-simulation of converter model
- Hardware in the Loop (HIL): Real-time testing of entire control hardware against converter model executed on dedicated real-time simulator.
- Hardware in the Loop (HIL) using the new PLECS RT Box
- Presentation and demonstration of the new PLECS RT Box
Location: The University of Nottingham | Date: Tuesday, 26 January 2016
Seminar address: C17 Pope Building, University Park Campus, University of Nottingham, Nottingham NG7 2RD. View the Park Campus map.
Attendance at the seminar is free but only a limited number of places are available. The seminar will start at 10am (expected duration is 2 hours). Please register your place now with Linda Davis at PPM Power – email: linda.davis@ppm.co.uk.
The deadline for registration is Tuesday 19th Jan
